1 * this specification are subject to be changed without notice. EM23C1000 series 128k x 8 cmos rom 3.13.1996 general description the EM23C1000 series high performance read only memory is organized as 131,072 words by 8 bits. it is designed to be compatible with all microprocessor and similar applications where high performance large bit storage and simple interface are important design considerations. the EM23C1000 series have two type. the one is offer the simplest operation (no power down). its programmable chip selects allow up to four 1m roms to be wired-or without external decoding. the other one has the automatic power down feature. the power down capability is controlled by the chip enable (ce/ce) input. when ce goes to high or ce goes low, the device will automatically goes to power down mode and remains in a low power standby mode as long as ce remains high. this unique feature provides system level power savings as much as 90%. an additional feature of this type is the output enable (oe/oe) function. this eliminates bus connection in multiple bus microprocessor systems. features ? 131,072 x 8 bit organization ? access time 150 ns (max.) at 4.5v v cc 5.5v ? low-power consumption: operating: 193 mw (max.) standby: 165 m w (max.) ? fully-static operation ? three-state outputs ? completely ttl compatible. ? EM23C1000bp, EM23C1000fp. EM23C1000bm, EM23C1000fm. - non power down version. - two programmable chip selects (cs/cs). ? EM23C1000ap, EM23C1000ep. EM23C1000am, EM23C1000em. - automatic power down (ce/ce). - output enable function (oe/oe). ? package: EM23C1000ap/bp - 28 pins 600 mil plastic dip. EM23C1000am/bm - 28 pins 450 mil plastic sop. EM23C1000ep/fp - 32 pins 600 mil plastic dip. EM23C1000 series 128k x 8 cmos rom
* this specification are subject to be changed without notice. EM23C1000 series 128k x 8 cmos rom 2 3.13.1996 pin assignments 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 nc a16 a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 d0 d1 d2 vss v dd nc nc a14 a13 a8 a9 a11 cs1/cs1 a10 cs2/cs2 d7 d6 d5 d4 d3 EM23C1000fp, EM23C1000fm 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 nc a16 a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 d0 d1 d2 vss v cc nc nc a14 a13 a8 a9 a11 oe/oe a10 ce/ce d7 d6 d5 d4 d3 EM23C1000ep, EM23C1000em 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 d0 d1 d2 vss v dd a14 a13 a8 a9 a11 a16 a10 cs/cs d7 d6 d5 d4 d3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 d0 d1 d2 vss v dd a14 a13 a8 a9 a11 a16 a10 ce/ce d7 d6 d5 d4 d3 EM23C1000bp, EM23C1000bm EM23C1000ap, EM23C1000am block diagram a0 a16 address input buffer decoder x y decoder ( 524,288 ) bit cell array y gating output buffer power down chip select circuit d0 d1 d6 d7 ce/ceb oe/oeb cs/csb ............. .......... . . . . . ce/ce oe/oe cs/cs
3 * this specification are subject to be changed without notice. EM23C1000 series 128k x 8 cmos rom 3.13.1996 function descriptions EM23C1000a/e mode ce oe a0-a16 d0-d7 power read active active valid data out i cc standby inactive * * high-z i sb output disable active inactive * high-z i cc EM23C1000b/f mode cs1 cs2 a0-a16 d0-d7 power read active active valid data out i cc output disable inactive * * high-z i cc output disable * inactive * high-z i cc note : * means active ( valid ) or inactive ( invalid ) absolute maximum ratings items sym. condition rating supply voltage v cc - 0.3v to 7 v input voltage v in - 0.3v to v cc +0.3v output voltage v out - 0.3v to v cc +0.3v operating temperature t opr 0 to 70 c storage temperature t str -65 c to 150 c supply voltage v cc 4.5 5.5 v recommended operating conditions (t opr =0~70 c) parameter sym. min. max. unit dc electrical characteristics (v cc = 4.5v to 5.5v, t opr =0~70 c) parameter sym. condition min. max. unit note input low voltage v il -0.3 0.8 v input high voltage v ih 2.2 v cc +0.3 v output low voltage v ol i ol = 400ma 0.4 v output high voltage v oh i oh = -100ma 2.4 v input leakage current i li v in = 0v to v cc 10 m a output leakage current i lo v out =0v to v cc 10 m a1 operating current i cc t rc = 150ns 35 ma standby current i sb ce = v ih 2 ma ce = v cc -0.2v 30 m a2 input capacitance c in f = 1mhz, 10 pf output capacitance c out t a = 25 c 10 pf note: 1. ce /oe =v ih , oe = v il , outputs open 2.automatic power down version
* this specification are subject to be changed without notice. EM23C1000 series 128k x 8 cmos rom 4 3.13.1996 (v cc = 4.5v to 5.5v t opr =0~70 c) parameter sym. condition min. max. unit cycle time t cyc 150 ns address access time t acc 150 ns output hold after address change t oh 10 ns chip enable access time t ce 1 150 ns chip select access time t cs 370 ns output enable access time t oe 1,3 70 ns output disable delay t df 250 ns note: 1. power down type only. (a/e). 2. outputs high impedence delay (t df ) is measure from either ce or oe going high or cs going inactive, whichever occurs first. 3. functions of cs/cs & oe/oe are identical. valid address previous data valid data t acc t oh address data bus bus propagation delay from address (ce/ ce=enable or cs/ cs=active) propagation delay from chip enable or chip select (address valid) t df t df t oe t cs t ce valid valid valid data ce/ce cs/cs oe/oe data bus high impedance timing diagram
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